Call fpuinit_mxcsr_mask in cpu_init, after cr4 is initialized, but before trunk
authormaxv <maxv@NetBSD.org>
Wed, 08 Nov 2017 17:52:22 +0000
branchtrunk
changeset 273147 880de0712133
parent 273146 f9a7917501d4
child 273148 61c4b04e7256
Call fpuinit_mxcsr_mask in cpu_init, after cr4 is initialized, but before touching xcr0. Then use clts/stts instead of modifying cr0, and enable the mxcsr_mask detection on Xen.
sys/arch/x86/x86/cpu.c
sys/arch/x86/x86/fpu.c
sys/arch/x86/x86/identcpu.c
sys/arch/xen/x86/cpu.c
--- a/sys/arch/x86/x86/cpu.c	Wed Nov 08 10:35:30 2017 +0000
+++ b/sys/arch/x86/x86/cpu.c	Wed Nov 08 17:52:22 2017 +0000
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.c,v 1.138 2017/10/17 07:33:44 maxv Exp $	*/
+/*	$NetBSD: cpu.c,v 1.139 2017/11/08 17:52:22 maxv Exp $	*/
 
 /*
  * Copyright (c) 2000-2012 NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.138 2017/10/17 07:33:44 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.139 2017/11/08 17:52:22 maxv Exp $");
 
 #include "opt_ddb.h"
 #include "opt_mpbios.h"		/* for MPDEBUG */
@@ -541,6 +541,7 @@
 void
 cpu_init(struct cpu_info *ci)
 {
+	extern int x86_fpu_save;
 	uint32_t cr4 = 0;
 
 	lcr0(rcr0() | CR0_WP);
@@ -584,6 +585,10 @@
 		lcr4(cr4);
 	}
 
+	if (x86_fpu_save >= FPU_SAVE_FXSAVE) {
+		fpuinit_mxcsr_mask();
+	}
+
 	/* If xsave is enabled, enable all fpu features */
 	if (cr4 & CR4_OSXSAVE)
 		wrxcr(0, x86_xsave_features & XCR0_FPU);
--- a/sys/arch/x86/x86/fpu.c	Wed Nov 08 10:35:30 2017 +0000
+++ b/sys/arch/x86/x86/fpu.c	Wed Nov 08 17:52:22 2017 +0000
@@ -1,4 +1,4 @@
-/*	$NetBSD: fpu.c,v 1.24 2017/11/04 08:58:30 maxv Exp $	*/
+/*	$NetBSD: fpu.c,v 1.25 2017/11/08 17:52:22 maxv Exp $	*/
 
 /*
  * Copyright (c) 2008 The NetBSD Foundation, Inc.  All
@@ -96,7 +96,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.24 2017/11/04 08:58:30 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.25 2017/11/08 17:52:22 maxv Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -233,23 +233,21 @@
 void
 fpuinit_mxcsr_mask(void)
 {
-#ifndef XEN
 	union savefpu fpusave __aligned(16);
-	u_long cr0, psl;
+	u_long psl;
 
 	memset(&fpusave, 0, sizeof(fpusave));
 
 	/* Disable interrupts, and enable FPU */
 	psl = x86_read_psl();
 	x86_disable_intr();
-	cr0 = rcr0();
-	lcr0(cr0 & ~(CR0_EM|CR0_TS));
+	clts();
 
 	/* Fill in the FPU area */
 	fxsave(&fpusave);
 
 	/* Restore previous state */
-	lcr0(cr0);
+	stts();
 	x86_write_psl(psl);
 
 	if (fpusave.sv_xmm.fx_mxcsr_mask == 0) {
@@ -257,12 +255,6 @@
 	} else {
 		x86_fpu_mxcsr_mask = fpusave.sv_xmm.fx_mxcsr_mask;
 	}
-#else
-	/*
-	 * XXX: Does the detection above work on Xen?
-	 */
-	x86_fpu_mxcsr_mask = __INITIAL_MXCSR_MASK__;
-#endif
 }
 
 /*
--- a/sys/arch/x86/x86/identcpu.c	Wed Nov 08 10:35:30 2017 +0000
+++ b/sys/arch/x86/x86/identcpu.c	Wed Nov 08 17:52:22 2017 +0000
@@ -1,4 +1,4 @@
-/*	$NetBSD: identcpu.c,v 1.64 2017/11/03 16:21:01 kre Exp $	*/
+/*	$NetBSD: identcpu.c,v 1.65 2017/11/08 17:52:22 maxv Exp $	*/
 
 /*-
  * Copyright (c) 1999, 2000, 2001, 2006, 2007, 2008 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.64 2017/11/03 16:21:01 kre Exp $");
+__KERNEL_RCSID(0, "$NetBSD: identcpu.c,v 1.65 2017/11/08 17:52:22 maxv Exp $");
 
 #include "opt_xen.h"
 
@@ -753,8 +753,6 @@
 
 	x86_fpu_save = FPU_SAVE_FXSAVE;
 
-	fpuinit_mxcsr_mask();
-
 	/* See if xsave (for AVX) is supported */
 	if ((ci->ci_feat_val[1] & CPUID2_XSAVE) == 0)
 		return;
--- a/sys/arch/xen/x86/cpu.c	Wed Nov 08 10:35:30 2017 +0000
+++ b/sys/arch/xen/x86/cpu.c	Wed Nov 08 17:52:22 2017 +0000
@@ -1,4 +1,4 @@
-/*	$NetBSD: cpu.c,v 1.112 2017/09/17 09:04:51 maxv Exp $	*/
+/*	$NetBSD: cpu.c,v 1.113 2017/11/08 17:52:22 maxv Exp $	*/
 
 /*-
  * Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.112 2017/09/17 09:04:51 maxv Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.113 2017/11/08 17:52:22 maxv Exp $");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -525,6 +525,7 @@
 void
 cpu_init(struct cpu_info *ci)
 {
+	extern int x86_fpu_save;
 
 	/*
 	 * If we have FXSAVE/FXRESTOR, use them.
@@ -539,6 +540,10 @@
 			lcr4(rcr4() | CR4_OSXMMEXCPT);
 	}
 
+	if (x86_fpu_save >= FPU_SAVE_FXSAVE) {
+		fpuinit_mxcsr_mask();
+	}
+
 	atomic_or_32(&ci->ci_flags, CPUF_RUNNING);
 }